Bugfix: miss channels order in cpu_dai
This commit is contained in:
peter.yang
parent
5028a91201
commit
878027066d
1 changed files with 82 additions and 26 deletions
108
ac108.c
108
ac108.c
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@ -16,13 +16,13 @@
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#include <linux/clk.h>
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#include <linux/i2c.h>
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#include <linux/slab.h>
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#include <linux/workqueue.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/initval.h>
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#include <sound/tlv.h>
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#include "ac108.h"
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/**
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@ -42,7 +42,6 @@ struct pll_div {
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unsigned int k2;
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};
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struct ac108_priv {
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struct i2c_client *i2c[4];
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int codec_index;
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@ -51,6 +50,7 @@ struct ac108_priv {
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int clk_id;
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unsigned char i2s_mode;
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unsigned char data_protocol;
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struct delayed_work dlywork;
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};
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static struct ac108_priv *ac108;
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@ -157,7 +157,6 @@ static const struct pll_div ac108_pll_div_list[] = {
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};
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//AC108 define
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#define AC108_CHANNELS_MAX 16 //range[1, 16]
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#define AC108_RATES (SNDRV_PCM_RATE_8000_96000 | SNDRV_PCM_RATE_KNOT)
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@ -379,7 +378,6 @@ static const struct soc_enum ac108_enum[] = {
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};
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static const struct snd_kcontrol_new ac108_snd_controls[] = {
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SOC_SINGLE("OUT1 Mute", I2S_FMT_CTRL3, 3, 1, 0),
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@ -747,10 +745,7 @@ static int ac108_configure_clocking(struct ac108_priv *ac108, unsigned int rate)
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0x00 << PLLCLK_EN | 0x00 << SYSCLK_SRC | 0x01 << SYSCLK_EN, ac108);
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ac108->mclk = ac108->sysclk;
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}
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/*0x21: Module clock enable<I2S, ADC digital, MIC offset Calibration, ADC analog>*/
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ac108_multi_chips_write(MOD_CLK_EN, 1 << I2S | 1 << ADC_DIGITAL | 1 << MIC_OFFSET_CALIBRATION | 1 << ADC_ANALOG, ac108);
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/*0x22: Module reset de-asserted<I2S, ADC digital, MIC offset Calibration, ADC analog>*/
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ac108_multi_chips_write(MOD_RST_CTRL, 1 << I2S | 1 << ADC_DIGITAL | 1 << MIC_OFFSET_CALIBRATION | 1 << ADC_ANALOG, ac108);
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return 0;
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}
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@ -787,11 +782,18 @@ static int ac108_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_h
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struct snd_soc_codec *codec = dai->codec;
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struct ac108_priv *ac108 = snd_soc_codec_get_drvdata(codec);
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unsigned bclkdiv;
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u8 r;
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dev_dbg(dai->dev, "%s\n", __FUNCTION__);
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channels = params_channels(params);
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/* Master mode, to clear cpu_dai fifos, output bclk without lrck */
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ac108_read(I2S_CTRL, &r, ac108->i2c[0]);
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if (r & (0x02 << LRCK_IOEN)) {
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ac108_update_bits(I2S_CTRL, 0x03 << LRCK_IOEN, 0x02 << LRCK_IOEN, ac108->i2c[0]);
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}
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_S8:
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sample_resolution = 0;
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@ -900,15 +902,19 @@ static int ac108_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_h
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* slots allocation for each chip
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*/
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ac108_multi_chips_slots(ac108, channels);
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return 0;
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}
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static int ac108_set_sysclk(struct snd_soc_dai *dai, int clk_id, unsigned int freq, int dir) {
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struct ac108_priv *ac108 = snd_soc_dai_get_drvdata(dai);
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freq = 24000000;
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clk_id = SYSCLK_SRC_PLL;
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pr_info("%s :%d\n", __FUNCTION__, freq);
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switch (clk_id) {
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case SYSCLK_SRC_MCLK:
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ac108_multi_chips_update_bits(SYSCLK_CTRL, 0x1 << SYSCLK_SRC, SYSCLK_SRC_MCLK << SYSCLK_SRC, ac108);
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@ -943,6 +949,8 @@ static int ac108_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) {
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struct ac108_priv *ac108 = dev_get_drvdata(dai->dev);
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int i;
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dev_dbg(dai->dev, "%s\n", __FUNCTION__);
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBM_CFM: /*AC108 Master*/
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dev_dbg(dai->dev, "AC108 set to work as Master\n");
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@ -950,7 +958,7 @@ static int ac108_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) {
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* 0x30:chip is master mode ,BCLK & LRCK output
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*/
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ac108_multi_chips_update_bits(I2S_CTRL, 0x03 << LRCK_IOEN | 0x03 << SDO1_EN | 0x1 << TXEN | 0x1 << GEN,
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0x03 << LRCK_IOEN | 0x03 << SDO1_EN | 0x1 << TXEN | 0x1 << GEN, ac108);
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0x02 << LRCK_IOEN | 0x03 << SDO1_EN | 0x1 << TXEN | 0x1 << GEN, ac108);
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/* multi_chips: only one chip set as Master, and the others also need to set as Slave */
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for (i = 1; i < ac108->codec_index; i++) {
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ac108_update_bits(I2S_CTRL, 0x3 << LRCK_IOEN, 0x0 << LRCK_IOEN, ac108->i2c[i]);
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@ -1068,32 +1076,81 @@ static int ac108_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) {
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ac108_multi_chips_update_bits(I2S_FMT_CTRL3, 0x01 << TX_MLS | 0x03 << SEXT | 0x01 << LRCK_WIDTH | 0x03 << TX_PDM,
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0x00 << TX_MLS | 0x03 << SEXT | 0x00 << LRCK_WIDTH | 0x00 << TX_PDM, ac108);
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/**???*/
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ac108_multi_chips_write(HPF_EN,0x00,ac108);
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ac108_multi_chips_write(HPF_EN, 0x00, ac108);
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return 0;
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}
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/*
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* due to miss channels order in cpu_dai, we meed defer the clock starting.
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*/
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static void ac108_work_start_clock(struct work_struct *work) {
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struct ac108_priv *ac108 = container_of(work, struct ac108_priv, dlywork.work);
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u8 r;
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/* enable lrck clock */
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ac108_read(I2S_CTRL, &r, ac108->i2c[0]);
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if (r & (0x02 << LRCK_IOEN)) {
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ac108_update_bits(I2S_CTRL, 0x03 << LRCK_IOEN, 0x03 << LRCK_IOEN, ac108->i2c[0]);
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}
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/* enable global clock */
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ac108_multi_chips_update_bits(I2S_CTRL, 0x1 << TXEN | 0x1 << GEN, 0x1 << TXEN | 0x1 << GEN, ac108);
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return;
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}
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static int ac108_trigger(struct snd_pcm_substream *substream, int cmd,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_codec *codec = dai->codec;
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struct ac108_priv *ac108 = snd_soc_codec_get_drvdata(codec);
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int ret = 0;
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dev_dbg(dai->dev, "%s()\n", __FUNCTION__);
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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/* disable global clock */
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ac108_multi_chips_update_bits(I2S_CTRL, 0x1 << TXEN | 0x1 << GEN, 0x1 << TXEN | 0x0 << GEN, ac108);
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/*0x21: Module clock enable<I2S, ADC digital, MIC offset Calibration, ADC analog>*/
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ac108_multi_chips_write(MOD_CLK_EN, 1 << I2S | 1 << ADC_DIGITAL | 1 << MIC_OFFSET_CALIBRATION | 1 << ADC_ANALOG, ac108);
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/*0x22: Module reset de-asserted<I2S, ADC digital, MIC offset Calibration, ADC analog>*/
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ac108_multi_chips_write(MOD_RST_CTRL, 1 << I2S | 1 << ADC_DIGITAL | 1 << MIC_OFFSET_CALIBRATION | 1 << ADC_ANALOG, ac108);
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/* delayed clock starting */
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schedule_delayed_work(&ac108->dlywork, msecs_to_jiffies(50));
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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break;
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default:
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ret = -EINVAL;
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}
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return ret;
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}
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static const struct snd_soc_dai_ops ac108_dai_ops = {
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/*DAI clocking configuration*/
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.set_sysclk = ac108_set_sysclk,
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/*ALSA PCM audio operations*/
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.hw_params = ac108_hw_params,
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// .trigger = ac108_trigger,
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// .hw_free = ac108_hw_free,
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//
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// /*DAI format configuration*/
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.trigger = ac108_trigger,
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// .hw_free = ac108_hw_free,
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/*DAI format configuration*/
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.set_fmt = ac108_set_fmt,
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};
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static const struct regmap_config ac108_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = PRNG_CLK_CTRL,
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.cache_type = REGCACHE_RBTREE,
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};
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static struct snd_soc_dai_driver ac108_dai0 = {
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.name = "ac108-codec0",
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.capture = {
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@ -1283,8 +1340,6 @@ static struct attribute_group ac108_debug_attr_group = {
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};
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static int ac108_i2c_probe(struct i2c_client *i2c,
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const struct i2c_device_id *i2c_id) {
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int ret = 0;
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@ -1297,7 +1352,9 @@ static int ac108_i2c_probe(struct i2c_client *i2c,
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dev_err(&i2c->dev, "Unable to allocate ac108 private data\n");
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return -ENOMEM;
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}
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INIT_DELAYED_WORK(&ac108->dlywork, ac108_work_start_clock);
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}
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ret = of_property_read_u32(np, "data-protocol", &val);
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if (ret) {
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pr_err("Please set data-protocol.\n");
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@ -1305,7 +1362,6 @@ static int ac108_i2c_probe(struct i2c_client *i2c,
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}
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ac108->data_protocol = val;
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/*Writing this register 0x12 resets all register to their default state.*/
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ac108_write(CHIP_RST, CHIP_RST_VAL, i2c);
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msleep(1);
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