Add: ac101 dsp_a mode, playing 2 in 8 channels OK

ac101-ok-20180119.state

@@ -0,0 +1,844 @@
+state.seeed8micvoicec {
+	control.1 {
+		iface MIXER
+		name 'AIF1 ADC timeslot 0 volume'
+		value.0 252
+		value.1 252
+		comment {
+			access 'read write'
+			type INTEGER
+			count 2
+			range '0 - 255'
+			dbmin -11925
+			dbmax 7200
+			dbvalue.0 6975
+			dbvalue.1 6975
+		}
+	}
+	control.2 {
+		iface MIXER
+		name 'AIF1 ADC timeslot 1 volume'
+		value.0 255
+		value.1 255
+		comment {
+			access 'read write'
+			type INTEGER
+			count 2
+			range '0 - 255'
+			dbmin -11925
+			dbmax 7200
+			dbvalue.0 7200
+			dbvalue.1 7200
+		}
+	}
+	control.3 {
+		iface MIXER
+		name 'AIF1 DAC timeslot 0 volume'
+		value.0 189
+		value.1 189
+		comment {
+			access 'read write'
+			type INTEGER
+			count 2
+			range '0 - 255'
+			dbmin -11925
+			dbmax 7200
+			dbvalue.0 2250
+			dbvalue.1 2250
+		}
+	}
+	control.4 {
+		iface MIXER
+		name 'AIF1 DAC timeslot 1 volume'
+		value.0 189
+		value.1 189
+		comment {
+			access 'read write'
+			type INTEGER
+			count 2
+			range '0 - 255'
+			dbmin -11925
+			dbmax 7200
+			dbvalue.0 2250
+			dbvalue.1 2250
+		}
+	}
+	control.5 {
+		iface MIXER
+		name 'AIF1 ADC timeslot 0 mixer gain'
+		value.0 15
+		value.1 15
+		comment {
+			access 'read write'
+			type INTEGER
+			count 2
+			range '0 - 15'
+			dbmin -600
+			dbmax 8400
+			dbvalue.0 8400
+			dbvalue.1 8400
+		}
+	}
+	control.6 {
+		iface MIXER
+		name 'AIF1 ADC timeslot 1 mixer gain'
+		value.0 3
+		value.1 3
+		comment {
+			access 'read write'
+			type INTEGER
+			count 2
+			range '0 - 3'
+			dbmin -600
+			dbmax 1200
+			dbvalue.0 1200
+			dbvalue.1 1200
+		}
+	}
+	control.7 {
+		iface MIXER
+		name 'ADC volume'
+		value.0 172
+		value.1 172
+		comment {
+			access 'read write'
+			type INTEGER
+			count 2
+			range '0 - 255'
+			dbmin -11925
+			dbmax 7200
+			dbvalue.0 975
+			dbvalue.1 975
+		}
+	}
+	control.8 {
+		iface MIXER
+		name 'DAC volume'
+		value.0 0
+		value.1 0
+		comment {
+			access 'read write'
+			type INTEGER
+			count 2
+			range '0 - 255'
+			dbmin -11925
+			dbmax 7200
+			dbvalue.0 -11925
+			dbvalue.1 -11925
+		}
+	}
+	control.9 {
+		iface MIXER
+		name 'DAC mixer gain'
+		value.0 10
+		value.1 10
+		comment {
+			access 'read write'
+			type INTEGER
+			count 2
+			range '0 - 15'
+			dbmin -600
+			dbmax 8400
+			dbvalue.0 5400
+			dbvalue.1 5400
+		}
+	}
+	control.10 {
+		iface MIXER
+		name 'digital volume'
+		value 3
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 63'
+			dbmin -7308
+			dbmax 0
+			dbvalue.0 -6960
+		}
+	}
+	control.11 {
+		iface MIXER
+		name 'ADC input gain'
+		value.0 5
+		value.1 5
+		comment {
+			access 'read write'
+			type INTEGER
+			count 2
+			range '0 - 7'
+			dbmin -450
+			dbmax 600
+			dbvalue.0 300
+			dbvalue.1 300
+		}
+	}
+	control.12 {
+		iface MIXER
+		name 'MIC1 boost amplifier gain'
+		value 4
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 7'
+			dbmin 0
+			dbmax 1400
+			dbvalue.0 800
+		}
+	}
+	control.13 {
+		iface MIXER
+		name 'MIC2 boost amplifier gain'
+		value 5
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 7'
+			dbmin 0
+			dbmax 1400
+			dbvalue.0 1000
+		}
+	}
+	control.14 {
+		iface MIXER
+		name 'LINEINL-LINEINR pre-amplifier gain'
+		value 4
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 7'
+			dbmin -1200
+			dbmax 900
+			dbvalue.0 0
+		}
+	}
+	control.15 {
+		iface MIXER
+		name 'MIC1 BST stage to L_R outp mixer gain'
+		value 3
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 7'
+			dbmin -450
+			dbmax 600
+			dbvalue.0 0
+		}
+	}
+	control.16 {
+		iface MIXER
+		name 'MIC2 BST stage to L_R outp mixer gain'
+		value 3
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 7'
+			dbmin -450
+			dbmax 600
+			dbvalue.0 0
+		}
+	}
+	control.17 {
+		iface MIXER
+		name 'LINEINL/R to L_R output mixer gain'
+		value 4
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 7'
+			dbmin -450
+			dbmax 600
+			dbvalue.0 150
+		}
+	}
+	control.18 {
+		iface MIXER
+		name 'speaker volume'
+		value 27
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 31'
+			dbmin -4800
+			dbmax -150
+			dbvalue.0 -750
+		}
+	}
+	control.19 {
+		iface MIXER
+		name 'headphone volume'
+		value 53
+		comment {
+			access 'read write'
+			type INTEGER
+			count 1
+			range '0 - 63'
+			dbmin -6300
+			dbmax 0
+			dbvalue.0 -1000
+		}
+	}
+	control.20 {
+		iface MIXER
+		name 'AIF1OUT0L Mux'
+		value SUM_AIF1AD0L_AIF1AD0R
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 AIF1_AD0L
+			item.1 AIF1_AD0R
+			item.2 SUM_AIF1AD0L_AIF1AD0R
+			item.3 AVE_AIF1AD0L_AIF1AD0R
+		}
+	}
+	control.21 {
+		iface MIXER
+		name 'AIF1OUT0R Mux'
+		value SUM_AIF1AD0L_AIF1AD0R
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 AIF1_AD0R
+			item.1 AIF1_AD0L
+			item.2 SUM_AIF1AD0L_AIF1AD0R
+			item.3 AVE_AIF1AD0L_AIF1AD0R
+		}
+	}
+	control.22 {
+		iface MIXER
+		name 'AIF1OUT1L Mux'
+		value SUM_AIF1ADC1L_AIF1ADC1R
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 AIF1_AD1L
+			item.1 AIF1_AD1R
+			item.2 SUM_AIF1ADC1L_AIF1ADC1R
+			item.3 AVE_AIF1ADC1L_AIF1ADC1R
+		}
+	}
+	control.23 {
+		iface MIXER
+		name 'AIF1OUT1R Mux'
+		value SUM_AIF1ADC1L_AIF1ADC1R
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 AIF1_AD1R
+			item.1 AIF1_AD1L
+			item.2 SUM_AIF1ADC1L_AIF1ADC1R
+			item.3 AVE_AIF1ADC1L_AIF1ADC1R
+		}
+	}
+	control.24 {
+		iface MIXER
+		name 'AIF1IN0L Mux'
+		value AIF1_DA0L
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 AIF1_DA0L
+			item.1 AIF1_DA0R
+			item.2 SUM_AIF1DA0L_AIF1DA0R
+			item.3 AVE_AIF1DA0L_AIF1DA0R
+		}
+	}
+	control.25 {
+		iface MIXER
+		name 'AIF1IN0R Mux'
+		value AIF1_DA0R
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 AIF1_DA0R
+			item.1 AIF1_DA0L
+			item.2 SUM_AIF1DA0L_AIF1DA0R
+			item.3 AVE_AIF1DA0L_AIF1DA0R
+		}
+	}
+	control.26 {
+		iface MIXER
+		name 'AIF1IN1L Mux'
+		value SUM_AIF1DA1L_AIF1DA1R
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 AIF1_DA1L
+			item.1 AIF1_DA1R
+			item.2 SUM_AIF1DA1L_AIF1DA1R
+			item.3 AVE_AIF1DA1L_AIF1DA1R
+		}
+	}
+	control.27 {
+		iface MIXER
+		name 'AIF1IN1R Mux'
+		value SUM_AIF1DA1L_AIF1DA1R
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 AIF1_DA1R
+			item.1 AIF1_DA1L
+			item.2 SUM_AIF1DA1L_AIF1DA1R
+			item.3 AVE_AIF1DA1L_AIF1DA1R
+		}
+	}
+	control.28 {
+		iface MIXER
+		name 'AIF1 AD0L Mixer AIF1 DA0L Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.29 {
+		iface MIXER
+		name 'AIF1 AD0L Mixer ADCL Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.30 {
+		iface MIXER
+		name 'AIF1 AD0R Mixer AIF1 DA0R Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.31 {
+		iface MIXER
+		name 'AIF1 AD0R Mixer ADCR Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.32 {
+		iface MIXER
+		name 'AIF1 AD1L Mixer ADCL Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.33 {
+		iface MIXER
+		name 'AIF1 AD1R Mixer ADCR Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.34 {
+		iface MIXER
+		name 'DACL Mixer ADCL Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.35 {
+		iface MIXER
+		name 'DACL Mixer AIF1DA1L Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.36 {
+		iface MIXER
+		name 'DACL Mixer AIF1DA0L Switch'
+		value true
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.37 {
+		iface MIXER
+		name 'DACR Mixer ADCR Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.38 {
+		iface MIXER
+		name 'DACR Mixer AIF1DA1R Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.39 {
+		iface MIXER
+		name 'DACR Mixer AIF1DA0R Switch'
+		value true
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.40 {
+		iface MIXER
+		name 'Left Output Mixer DACR Switch'
+		value true
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.41 {
+		iface MIXER
+		name 'Left Output Mixer DACL Switch'
+		value true
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.42 {
+		iface MIXER
+		name 'Left Output Mixer LINEINL Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.43 {
+		iface MIXER
+		name 'Left Output Mixer LINEINL-LINEINR Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.44 {
+		iface MIXER
+		name 'Left Output Mixer MIC2Booststage Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.45 {
+		iface MIXER
+		name 'Left Output Mixer MIC1Booststage Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.46 {
+		iface MIXER
+		name 'Right Output Mixer DACL Switch'
+		value true
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.47 {
+		iface MIXER
+		name 'Right Output Mixer DACR Switch'
+		value true
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.48 {
+		iface MIXER
+		name 'Right Output Mixer LINEINR Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.49 {
+		iface MIXER
+		name 'Right Output Mixer LINEINL-LINEINR Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.50 {
+		iface MIXER
+		name 'Right Output Mixer MIC2Booststage Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.51 {
+		iface MIXER
+		name 'Right Output Mixer MIC1Booststage Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.52 {
+		iface MIXER
+		name 'HP_R Mux'
+		value 'DACR HPR Switch'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'DACR HPR Switch'
+			item.1 'Right Analog Mixer HPR Switch'
+		}
+	}
+	control.53 {
+		iface MIXER
+		name 'HP_L Mux'
+		value 'DACL HPL Switch'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'DACL HPL Switch'
+			item.1 'Left Analog Mixer HPL Switch'
+		}
+	}
+	control.54 {
+		iface MIXER
+		name 'SPK_R Mux'
+		value 'MIXER Switch'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'MIXER Switch'
+			item.1 'MIXR MIXL Switch'
+		}
+	}
+	control.55 {
+		iface MIXER
+		name 'SPK_L Mux'
+		value 'MIXEL Switch'
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 'MIXEL Switch'
+			item.1 'MIXL MIXR  Switch'
+		}
+	}
+	control.56 {
+		iface MIXER
+		name 'LEFT ADC input Mixer MIC1 boost Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.57 {
+		iface MIXER
+		name 'LEFT ADC input Mixer MIC2 boost Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.58 {
+		iface MIXER
+		name 'LEFT ADC input Mixer LININL-R Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.59 {
+		iface MIXER
+		name 'LEFT ADC input Mixer LINEINL Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.60 {
+		iface MIXER
+		name 'LEFT ADC input Mixer Lout_Mixer_Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.61 {
+		iface MIXER
+		name 'LEFT ADC input Mixer Rout_Mixer_Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.62 {
+		iface MIXER
+		name 'RIGHT ADC input Mixer MIC1 boost Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.63 {
+		iface MIXER
+		name 'RIGHT ADC input Mixer MIC2 boost Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.64 {
+		iface MIXER
+		name 'RIGHT ADC input Mixer LINEINL-R Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.65 {
+		iface MIXER
+		name 'RIGHT ADC input Mixer LINEINR Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.66 {
+		iface MIXER
+		name 'RIGHT ADC input Mixer Rout_Mixer_Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.67 {
+		iface MIXER
+		name 'RIGHT ADC input Mixer Lout_Mixer_Switch'
+		value false
+		comment {
+			access 'read write'
+			type BOOLEAN
+			count 1
+		}
+	}
+	control.68 {
+		iface MIXER
+		name 'MIC2 SRC'
+		value none
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 none
+			item.1 MIC2
+		}
+	}
+	control.69 {
+		iface MIXER
+		name 'ADCL Mux'
+		value ADC
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 ADC
+			item.1 DMIC
+		}
+	}
+	control.70 {
+		iface MIXER
+		name 'ADCR Mux'
+		value ADC
+		comment {
+			access 'read write'
+			type ENUMERATED
+			count 1
+			item.0 ADC
+			item.1 DMIC
+		}
+	}
+}

ac101.h

@@ -71,6 +71,9 @@
 #define ADDA_TUNE3			0x5c
 #define HPOUT_STR			0x5d
 
+/*CHIP_AUDIO_RST*/
+#define AC101_CHIP_ID			0x0101
+
 /*PLL_CTRL1*/
 #define DPLL_DAC_BIAS		14
 #define PLL_POSTDIV_M		8
@@ -423,7 +426,7 @@ struct spk_gpio {
 };
 #define AC10X_DEBG
 #ifdef AC10X_DEBG
-    #define AC10X_DBG(format,args...)  printk("[AC100] "format,##args)
+    #define AC10X_DBG(format,args...)  printk("[AC101] "format,##args)
 #else
     #define AC10X_DBG(...)
 #endif

seeed-8mic-voicecard-overlay.dts

@@ -30,6 +30,12 @@
 			#size-cells = <0>;
 			status = "okay";
 
+			ac101: ac101@1a{
+				compatible = "x-power,ac101";
+				reg = <0x1a>;
+				#sound-dai-cells = <0>;
+			};
+/*
 			ac108_a: ac108@35{
 				compatible = "x-power,ac108_0";
 				reg = <0x35>;
@@ -43,10 +49,10 @@
 				#sound-dai-cells = <0>;
 				data-protocol = <0>;
 			};
+*/
 		};
 	};
 
-
 	fragment@3 {
 		target = <&sound>;
 
@@ -64,13 +70,14 @@
 			cpu_dai: simple-audio-card,cpu {
 				sound-dai = <&i2s>;
 				dai-tdm-slot-num     = <2>;
-				dai-tdm-slot-width   = <32>;
+				dai-tdm-slot-width   = <16>;
 				dai-tdm-slot-tx-mask = <1 1 0 0>;
 				dai-tdm-slot-rx-mask = <1 1 0 0>;
 			};
 			codec_dai: simple-audio-card,codec {
-				sound-dai = <&ac108_b>;
+				sound-dai = <&ac101>;
 				clocks =  <&ac108_mclk>;
+				system-clock-id = <1>;
 			};
 		};
 	};