Fix: i2c access fail when AC108 as master, support make DEBUG=1
This commit is contained in:
Peter.Yang
parent
1901914b56
commit
860d38fc47
4 changed files with 70 additions and 42 deletions
6
Makefile
6
Makefile
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@ -7,6 +7,12 @@ obj-m += snd-soc-wm8960.o
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obj-m += snd-soc-ac108.o
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obj-m += snd-soc-simple-card.o
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ifdef DEBUG
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ifneq ($(DEBUG),0)
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ccflags-y += -DDEBUG -DAC101_DEBG
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endif
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endif
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all:
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make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
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32
ac101.c
32
ac101.c
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@ -20,7 +20,10 @@
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* the License, or (at your option) any later version.
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*
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*/
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#undef AC101_DEBG
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/* #undef AC101_DEBG
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* use 'make DEBUG=1' to enable debugging
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*/
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#include <linux/module.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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@ -292,22 +295,17 @@ static int ac101_aif1clk(struct snd_soc_codec* codec, int event) {
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unsigned long flags;
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int ret;
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AC101_DBG("%s() L%d event=%d pre_up/%d post_down/%d\n", __func__, __LINE__,
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event, SND_SOC_DAPM_PRE_PMU, SND_SOC_DAPM_POST_PMD);
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/* I know it will degrades performance, but I have no choice */
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spin_lock_irqsave(&ac10x->lock, flags);
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switch (event) {
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case SND_SOC_DAPM_PRE_PMU:
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if (ac10x->aif1_clken == 0){
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/* I know it will degrades performance, but I have no choice */
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spin_lock_irqsave(&ac10x->lock, flags);
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/* enable aif1clk & sysclk */
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ret = ac101_update_bits(codec, SYSCLK_CTRL, (0x1<<AIF1CLK_ENA), (0x1<<AIF1CLK_ENA));
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ret = ret || ac101_update_bits(codec, MOD_CLK_ENA, (0x1<<MOD_CLK_AIF1), (0x1<<MOD_CLK_AIF1));
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ret = ret || ac101_update_bits(codec, MOD_RST_CTRL, (0x1<<MOD_RESET_AIF1), (0x1<<MOD_RESET_AIF1));
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ret = ret || ac101_update_bits(codec, SYSCLK_CTRL, (0x1<<SYSCLK_ENA), (0x1<<SYSCLK_ENA));
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spin_unlock_irqrestore(&ac10x->lock, flags);
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if (ret) {
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AC101_DBG("%s() L%d start sysclk failed\n", __func__, __LINE__);
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@ -319,15 +317,11 @@ static int ac101_aif1clk(struct snd_soc_codec* codec, int event) {
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break;
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case SND_SOC_DAPM_POST_PMD:
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if (ac10x->aif1_clken != 0) {
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/* I know it will degrades performance, but I have no choice */
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spin_lock_irqsave(&ac10x->lock, flags);
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/* disable aif1clk & sysclk */
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ret = ac101_update_bits(codec, SYSCLK_CTRL, (0x1<<AIF1CLK_ENA),(0x0<<AIF1CLK_ENA));
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ret = ret || ac101_update_bits(codec, MOD_CLK_ENA, (0x1<<MOD_CLK_AIF1), (0x0<<MOD_CLK_AIF1));
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ret = ret || ac101_update_bits(codec, MOD_RST_CTRL, (0x1<<MOD_RESET_AIF1), (0x0<<MOD_RESET_AIF1));
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ret = ret || ac101_update_bits(codec, SYSCLK_CTRL, (0x1<<SYSCLK_ENA), (0x0<<SYSCLK_ENA));
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spin_unlock_irqrestore(&ac10x->lock, flags);
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if (ret) {
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AC101_DBG("%s() L%d stop sysclk failed\n", __func__, __LINE__);
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@ -338,6 +332,10 @@ static int ac101_aif1clk(struct snd_soc_codec* codec, int event) {
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break;
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}
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}
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spin_unlock_irqrestore(&ac10x->lock, flags);
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AC101_DBG("%s() L%d event=%d pre_up/%d post_down/%d\n", __func__, __LINE__,
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event, SND_SOC_DAPM_PRE_PMU, SND_SOC_DAPM_POST_PMD);
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return 0;
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}
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@ -478,8 +476,8 @@ static const struct pll_div codec_pll_div[] = {
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{5644800, _FREQ_22_579K, 1, 12, 0}, /* accurate, 22050 * 256 */
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{6000000, _FREQ_22_579K, 38, 429, 0}, /*((429+0*0.2)*6000000)/(38*(2*1+1))*/
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{11289600, _FREQ_22_579K, 1, 6, 0}, /* accurate, 44100 * 256 */
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{13000000, _FREQ_22_579K, 19, 99, 0},
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{19200000, _FREQ_22_579K, 25, 88, 1},
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{13000000, _FREQ_22_579K, 19, 99, 0},
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{19200000, _FREQ_22_579K, 25, 88, 1},
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{24000000, _FREQ_22_579K, 63, 177, 4}, /* 22577778 Hz */
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{128000, _FREQ_24_576K, 1, 576, 0},
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@ -1178,6 +1176,12 @@ int ac101_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
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return ret;
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}
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/* Chip reset */
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/*
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ret = regmap_write(ac10x->regmap101, CHIP_AUDIO_RST, 0);
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msleep(50);
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*/
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ret = regmap_read(ac10x->regmap101, CHIP_AUDIO_RST, &v);
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if (ret < 0) {
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dev_err(&i2c->dev, "failed to read vendor ID: %d\n", ret);
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70
ac108.c
70
ac108.c
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@ -8,7 +8,10 @@
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#undef DEBUG
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/* #undef DEBUG
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* use 'make DEBUG=1' to enable debugging
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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@ -547,10 +550,6 @@ static int ac108_config_pll(struct ac10x_priv *ac10x, unsigned rate, unsigned lr
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/*0x18: PLL clk lock enable*/
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ac108_multi_update_bits(PLL_LOCK_CTRL, 0x1 << PLL_LOCK_EN, 0x1 << PLL_LOCK_EN, ac10x);
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/*0x10: PLL Common voltage Enable, PLL Enable,PLL loop divider factor detection enable*/
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ac108_multi_update_bits(PLL_CTRL1, 0x01 << PLL_EN | 0x01 << PLL_COM_EN | 0x01 << PLL_NDET,
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0x01 << PLL_EN | 0x01 << PLL_COM_EN | 0x01 << PLL_NDET, ac10x);
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/**
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* 0x20: enable pll, pll source from mclk/bclk, sysclk source from pll, enable sysclk
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*/
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@ -670,8 +669,8 @@ static int ac108_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_h
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/* Master mode, to clear cpu_dai fifos, output bclk without lrck */
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ac10x_read(I2S_CTRL, &v, ac10x->i2cmap[_MASTER_INDEX]);
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if (v & (0x02 << LRCK_IOEN)) {
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ac10x_update_bits(I2S_CTRL, 0x03 << LRCK_IOEN, 0x02 << LRCK_IOEN, ac10x->i2cmap[_MASTER_INDEX]);
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if (v & (0x01 << BCLK_IOEN)) {
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ac10x_update_bits(I2S_CTRL, 0x1 << LRCK_IOEN, 0x0 << LRCK_IOEN, ac10x->i2cmap[_MASTER_INDEX]);
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}
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switch (params_format(params)) {
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@ -792,6 +791,11 @@ static int ac108_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_h
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*/
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ac108_multi_chips_slots(ac10x, channels);
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/*0x21: Module clock enable<I2S, ADC digital, MIC offset Calibration, ADC analog>*/
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ac108_multi_write(MOD_CLK_EN, 1 << I2S | 1 << ADC_DIGITAL | 1 << MIC_OFFSET_CALIBRATION | 1 << ADC_ANALOG, ac10x);
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/*0x22: Module reset de-asserted<I2S, ADC digital, MIC offset Calibration, ADC analog>*/
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ac108_multi_write(MOD_RST_CTRL, 1 << I2S | 1 << ADC_DIGITAL | 1 << MIC_OFFSET_CALIBRATION | 1 << ADC_ANALOG, ac10x);
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dev_dbg(dai->dev, "%s() stream=%s ---\n", __func__,
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snd_pcm_stream_str(substream));
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@ -851,7 +855,7 @@ static int ac108_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) {
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ac108_multi_update_bits(I2S_CTRL, 0x03 << LRCK_IOEN | 0x03 << SDO1_EN | 0x1 << TXEN | 0x1 << GEN,
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0x00 << LRCK_IOEN | 0x03 << SDO1_EN | 0x1 << TXEN | 0x1 << GEN, ac10x);
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/* multi_chips: only one chip set as Master, and the others also need to set as Slave */
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ac10x_update_bits(I2S_CTRL, 0x3 << LRCK_IOEN, 0x2 << LRCK_IOEN, ac10x->i2cmap[_MASTER_INDEX]);
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ac10x_update_bits(I2S_CTRL, 0x3 << LRCK_IOEN, 0x01 << BCLK_IOEN, ac10x->i2cmap[_MASTER_INDEX]);
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break;
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} else {
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/* TODO: Both cpu_dai and codec_dai(AC108) be set as slave in DTS */
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@ -863,8 +867,8 @@ static int ac108_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) {
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* 0x30:chip is slave mode, BCLK & LRCK input,enable SDO1_EN and
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* SDO2_EN, Transmitter Block Enable, Globe Enable
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*/
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ac108_multi_update_bits(I2S_CTRL, 0x03 << LRCK_IOEN | 0x03 << SDO1_EN | 0x1 << TXEN | 0x1 << GEN,
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0x00 << LRCK_IOEN | 0x03 << SDO1_EN | 0x1 << TXEN | 0x1 << GEN, ac10x);
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ac108_multi_update_bits(I2S_CTRL, 0x03 << LRCK_IOEN | 0x03 << SDO1_EN | 0x0 << TXEN | 0x0 << GEN,
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0x00 << LRCK_IOEN | 0x03 << SDO1_EN | 0x0 << TXEN | 0x0 << GEN, ac10x);
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break;
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default:
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pr_err("AC108 Master/Slave mode config error:%u\n\n", (fmt & SND_SOC_DAIFMT_MASTER_MASK) >> 12);
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@ -930,13 +934,6 @@ static int ac108_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) {
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return -EINVAL;
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}
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#if 0
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/* revert LRCK polarity if it's single chip (master mode) */
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if (ac10x->tdm_chips_cnt < 2) {
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lrck_polarity = (lrck_polarity == LRCK_LEFT_HIGH_RIGHT_LOW)?
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LRCK_LEFT_LOW_RIGHT_HIGH: LRCK_LEFT_HIGH_RIGHT_LOW;
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}
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#endif
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ac108_configure_power(ac10x);
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/**
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@ -987,14 +984,16 @@ static int ac108_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) {
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* due to miss channels order in cpu_dai, we meed defer the clock starting.
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*/
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static int ac108_set_clock(int y_start_n_stop) {
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unsigned long flags;
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u8 r;
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dev_dbg(ac10x->codec->dev, "%s() L%d start:%d\n", __func__, __LINE__, y_start_n_stop);
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spin_lock_irqsave(&ac10x->lock, flags);
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if (y_start_n_stop) {
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/* enable lrck clock */
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ac10x_read(I2S_CTRL, &r, ac10x->i2cmap[_MASTER_INDEX]);
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if (r & (0x02 << LRCK_IOEN)) {
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if (r & (0x01 << BCLK_IOEN)) {
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ac10x_update_bits(I2S_CTRL, 0x03 << LRCK_IOEN, 0x03 << LRCK_IOEN, ac10x->i2cmap[_MASTER_INDEX]);
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}
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@ -1005,10 +1004,11 @@ static int ac108_set_clock(int y_start_n_stop) {
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ac10x_read(I2S_CTRL, &r, ac10x->i2cmap[_MASTER_INDEX]);
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if (r & (0x01 << LRCK_IOEN)) {
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ac108_multi_update_bits(I2S_CTRL, 0x1 << TXEN | 0x1 << GEN, 0x1 << TXEN | 0x0 << GEN, ac10x);
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ac10x_update_bits(I2S_CTRL, 0x03 << LRCK_IOEN, 0x02 << LRCK_IOEN, ac10x->i2cmap[_MASTER_INDEX]);
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ac10x_update_bits(I2S_CTRL, 0x03 << LRCK_IOEN, 0x01 << BCLK_IOEN, ac10x->i2cmap[_MASTER_INDEX]);
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ac108_multi_update_bits(I2S_CTRL, 0x1 << TXEN | 0x1 << GEN, 0x1 << TXEN | 0x1 << GEN, ac10x);
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}
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}
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spin_unlock_irqrestore(&ac10x->lock, flags);
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return 0;
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}
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@ -1028,6 +1028,7 @@ static int ac108_trigger(struct snd_pcm_substream *substream, int cmd,
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{
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struct snd_soc_codec *codec = dai->codec;
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struct ac10x_priv *ac10x = snd_soc_codec_get_drvdata(codec);
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unsigned long flags;
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int ret = 0;
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u8 r;
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@ -1036,10 +1037,12 @@ static int ac108_trigger(struct snd_pcm_substream *substream, int cmd,
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snd_pcm_stream_str(substream),
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cmd);
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spin_lock_irqsave(&ac10x->lock, flags);
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if (ac10x->i2c101 && _MASTER_MULTI_CODEC == _MASTER_AC101) {
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ac101_trigger(substream, cmd, dai);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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return 0;
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goto __ret;
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}
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}
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@ -1049,27 +1052,39 @@ static int ac108_trigger(struct snd_pcm_substream *substream, int cmd,
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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/* disable global clock if lrck disabled */
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ac10x_read(I2S_CTRL, &r, ac10x->i2cmap[_MASTER_INDEX]);
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if ((r & (0x02 << LRCK_IOEN)) && (r & (0x01 << LRCK_IOEN)) == 0) {
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if ((r & (0x01 << BCLK_IOEN)) && (r & (0x01 << LRCK_IOEN)) == 0) {
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/* disable global clock */
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ac108_multi_update_bits(I2S_CTRL, 0x1 << TXEN | 0x1 << GEN, 0x1 << TXEN | 0x0 << GEN, ac10x);
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}
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/*0x21: Module clock enable<I2S, ADC digital, MIC offset Calibration, ADC analog>*/
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ac108_multi_write(MOD_CLK_EN, 1 << I2S | 1 << ADC_DIGITAL | 1 << MIC_OFFSET_CALIBRATION | 1 << ADC_ANALOG, ac10x);
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/*0x22: Module reset de-asserted<I2S, ADC digital, MIC offset Calibration, ADC analog>*/
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ac108_multi_write(MOD_RST_CTRL, 1 << I2S | 1 << ADC_DIGITAL | 1 << MIC_OFFSET_CALIBRATION | 1 << ADC_ANALOG, ac10x);
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/*0x10: PLL Common voltage enable, PLL enable */
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ac108_multi_update_bits(PLL_CTRL1, 0x01 << PLL_EN | 0x01 << PLL_COM_EN,
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0x01 << PLL_EN | 0x01 << PLL_COM_EN, ac10x);
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if (ac10x->i2c101 && _MASTER_MULTI_CODEC == _MASTER_AC101) {
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/* enable global clock */
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ac108_multi_update_bits(I2S_CTRL, 0x1 << TXEN | 0x1 << GEN, 0x1 << TXEN | 0x1 << GEN, ac10x);
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}
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/* delayed clock starting, move to simple_card_trigger() */
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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/*0x10: PLL Common voltage disable, PLL disable */
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ac108_multi_update_bits(PLL_CTRL1, 0x01 << PLL_EN | 0x01 << PLL_COM_EN,
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0x00 << PLL_EN | 0x00 << PLL_COM_EN, ac10x);
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if (ac10x->i2c101 && _MASTER_MULTI_CODEC == _MASTER_AC101) {
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/* disable global clock */
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ac108_multi_update_bits(I2S_CTRL, 0x1 << TXEN | 0x1 << GEN, 0x0 << TXEN | 0x0 << GEN, ac10x);
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}
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break;
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default:
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ret = -EINVAL;
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}
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__ret:
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spin_unlock_irqrestore(&ac10x->lock, flags);
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return ret;
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}
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@ -1378,6 +1393,9 @@ static int ac108_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *i
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ac10x->i2c101 = i2c;
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i2c_set_clientdata(i2c, ac10x);
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ret = ac101_probe(i2c, i2c_id);
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if (ret) {
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return ret;
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}
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goto __ret;
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}
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@ -8,7 +8,7 @@
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#undef DEBUG
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/* #undef DEBUG */
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/gpio.h>
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@ -240,7 +240,7 @@ static int asoc_simple_card_trigger(struct snd_pcm_substream *substream, int cmd
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ret = -EINVAL;
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}
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return 0;
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return ret;
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}
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static struct snd_soc_ops asoc_simple_card_ops = {
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